A Study to Realize a CMOS Pipelined Current-Mode A-to-D Converter for Video Applications

The possibility of realizing a CMOS pipelined currentmode A-D converter (ADC) for video applications has been examined. Two times the input current is obtained at the output of a bit-block of a pipelined ADC by subtracting the negative output current from the positive output current in the pseudo-differential configuration. Subtraction of the sub-DAC (D-to-A converter) current from the two times the input current is performed by controlling of the current comparator, which compares the positive and the negative input currents. A prototype chip has been implemented using 0.35 μm CMOS devices. It operates in 28 MS/s, and showed a 42 dB signal-to-noise ratio from the 2 V supply voltage. key words: current-mode circuit, pipelined ADC, low-voltage, highresolution